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RFEL's channeliser designs are based on novel frequency transform
techniques that allow downconversion of a large number of channels
in a highly efficient manner, reducing system cost and complexity.
The designs are sold as Intellectual Property (IP) cores to equipment
manufacturers and allow a reduced risk route and a faster design
cycle.
The figure below shows the general concept for downconversion of
N channels from a wideband input.
The cores are
designed to extract a number of signals from a wideband input source,
filter and downconvert to baseband. The range of cores available
includes fixed configuration cores that are optimal for a specific
fixed requirement and configurable cores that provide real-time
control of channel parameters such as centre frequency, bandwidth
and output rate.
Being FPGA-based, RFEL's existing reference designs can be tailored
to meet particular processing and interface requirements, such as
input/output format, number of channels, dynamic range and filter
shape.
ChannelCore64
is a 64-channel DDC core targeted at Xilinx FPGAs. This core can
be used as a replacement for standard ASIC based DDC chips, or single
channel DDC cores. Product
Page
RFEL
can also produce custom channeliser cores tailored to specific application
requirements. Three main architectures can be used to produce custom
channelisation system:
1) Polyphase DFT is an efficient method used to implement
a uniformly distributed multi-channel filter bank, where all channels
have the same bandwidth and filter characteristics and are evenly
spaced across the band. Product Page
2) Pipelined Frequency Transform (PFT) cores can be used
to produce a flexible channelisation system, with many channels
that vary in bandwidth and filter characteristics. Product
Page
3) Tuneable Pipelined Frequency Transform (TPFT) is an extension
to the PFT that supports reconfiguration and retuning of individual
channels in real-time. Product Page
If you have a specific channelisation requirement please contact
RFEL who will be pleased to recommend the most suitable architecture,
and provide silicon estimates and pricing information.
Features
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Downconversion of 1000s of channels in a single FPGA. |
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Wide
input bandwidths supported, up to GHz |
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Use
of silicon efficient frequency transform techniques for channelisation. |
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Bit
true Matlab models allow simulation of the channeliser, reducing
the development risks. |
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Xilinx and Altera FPGA devices supported |
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Designs are customised for each application to minimise silicon usage |
Applications
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Telecommunications
base stations |
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Satellite
communication systems |
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Software
defined radio |
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Military
communications systems |
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Radio
monitoring systems |
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